Project details explanation Uvm flow questions Implementation of the uvm driver code for given scenarios. Coding of tlm fifo for given scenario System verilog questions Assertions related questions Apptitide and some logical questions. Two levels of interview .
I applied online. I interviewed at SeviTech Systems (Bengaluru)
Interview
Applied for the role of Design Verification Engineer. There is only one technical round and questions are from your resume and related to sv, uvm. and questions asked from protocols
Interview questions [1]
Question 1
1.Introduction about yourself 2.Questions related to sv,uvm 3.Questions related to protocols 4.Coding skills
I applied online. I interviewed at SeviTech Systems (Bengaluru) in Oct 2022
Interview
1.First round is of technical (there we can expect questions from resume and protocols,related to SV,UVM) 2.Second round is with HR (discussion about salary and benefits) The interview process was good
Interview questions [1]
Question 1
1.Brief introduction 2.Explanation of the projects 3.Protocol related questions 4.UVM related questions 5.SV related questions